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Xilinx ISE Design Suite v 13.3 now available
Xilinx has announced the availability of Version 13.3 of their ISE Design Suite. This download includes the free Webpack version of the ISE and is available for Windows and Linux. This is the software...
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App note: CPLD special function pins
Here is some basic information about special CPLD pin functions you might need when getting started with Xilinx or any other CPLD: Global Clock (GCK) pins Many high-speed digital logic designs need a...
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XC95144XL breakout boards
Jason decided to make breakout boards for the XC95144XL CPLD. A voltage regulator along with bypass capacitors are placed on-board. He provided a oscillator, connected to a global clock pin as well....
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Xilinx CoolRunner-II CPLD starter kit
Arhi tipped us to this starter kit for CoolRunner-II CPLDs: I can highly recommend CoolRunner-II CPLD Starter Kit. I have this small board for a while and it’s more then you need to learn to use...
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DSJTAG – USB JTAG debugger and programmer for both Xilinx and Altera IDEs
Seeed has a cheap JTAG programmer/debugger for both major FPGA/CPLD brands. It emulates both the Xilinx Platform USB Cable and Altera USB blaster JTAG programmers with a flip of a switch. As a Xilinx...
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Xilinx ISE Design Suite v 13.4 now available
Xilinx has announced the availability of Version 13.4 of their ISE Design Suite. This download includes the free Webpack version of the ISE and is available for Windows and Linux. This release...
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Xilinx free online Xcell Journal
Xilinx has released Issue 78 of Xcell Journal, their free online publication for embedded system and programmable logic developers. Each issue of Xcell has articles targeted at developers from every...
View ArticlePrograming CoolRunner II CPLDs from Windows 7
Kiran wrote a short tutorial on how to program the Xilinx CoolRunner II CPLD development board with a computer running Windows 7. The board features an onboard USB programmer but the drivers for it...
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3D Model: XC95144XL Breakout Board
Today we made the 3D model of the XC95144XL CPLD breakout board. The board has 39 of the CPLD pins broken out to a “Blade” style configuration, while the remaining pins are broken out to two dual-row...
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Xilinx CPLD design techniques online documentation
Xilinx has an online searchable database of information on programming their CPLD devices. It includes a number of cool tips and code samples for implementing bidirectional signals, clock dividers,...
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App note: Xilinx in-system programming using an embedded microcontroller
Program Xilinx’ CPLDs and FPGAs with the aid from this app note. By using a simple JTAG interface, Xilinx devices are easily programmed and tested without using expensive hardware. Multiple devices...
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App note: CPLDs as Motor Controllers
Here’s a simple motor controller implementation using CPLDs from Xilinx. To enable a CPLD to turn the electromagnets on and off, external transistor drivers must be used. A unipolar stepper motor can...
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App note: Understanding XC9500XL CPLD power
Here’s an app note from Xilinx on calculating power consumption for a CPLD. The goal of this application note is to discuss XC9500XL CPLD power estimation and optimization and provide the reader with...
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App note: CPLD timing
See from Xilinx app note the timing constraints on CPLDs. In this application note we will discuss how to constrain a CPLD design and how to verify that the design has met timing. Fundamentally, CPLD...
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App note: Using a microprocessor to configure Xilinx FPGAs via slave serial...
Great app note from Xilinx on configuring their FPGA through slave serial and parallel selectMAP mode This application note describes a technique for configuring an FPGA from an embedded processor....
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App note: Driving LEDs with Xilinx CPLDs
Here’s Xilinx app note on using CPLDs to perform the same functionality as those common LED driver chips. Light-Emitting Diodes (LEDs) are commonplace on the modern day Printed Circuit Board (PCB)....
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App note: Power-supply solutions for Xilinx FPGAs
MAXIM’s power solution for Xilinx’ FPGAs. App note here (PDF!) Field-programmable gate arrays (FPGAs) are used in a wide variety of applications and end markets, including digital signal processing,...
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App note: AXI Chip2Chip reference design for real-time video
AXI Chip2Chip reference design for real-time video application (PDF!) from Xilinx: The LogiCORE™ IP AXI Chip2Chip is a soft Xilinx core that provides bridging between Advanced eXtensible Interface...
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App note: FPGA configuration from SPI Flash memory using a Microprocessor
From Xilinx application note on FPGA configuration method: This application note describes a simple and efficient FPGA configuration method that utilizes a microprocessor to configure an FPGA device...
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App note: D-PHY Solutions
An app note (PDF!) from Xilinx on D-PHY Solutions: Traditionally, interfaces between components on a printed circuit board (PCB) are based on single-ended parallel buses at low bit rates (LVCMOS),...
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